1. Field of the Invention
The present invention relates generally to an improved data processing system. More specifically, the present invention is directed to packaging a plurality of microelectronic components within an integrated module to enable higher data processing system performance.
2. Description of the Related Art
Today, there are many advantages to using silicon circuits packaged on a single die, which is often referred to as a System on Chip (SoC). One such advantage is that this single die may provide the total function required to provide an end product function. Thus, if manufacturing yield is high on this single die, then product costs may be decreased.
The idea of a machine that includes a multitude of functions being processed on a single wafer and is interconnected by means such as wire bonding or flip chip technology to provide an interconnection method to permit system machine operation, has previously been proposed. However, the current ability to fabricate a very large SoC on a wafer at competitive costs has practical limits. As a result, semiconductor die sizes today depend on application and may range from a lower size of less than 5 mm×5 mm for limited performance applications to an upper bound of about 20 mm by 20 mm to 25 mm by 25 mm for high performance applications with practical yields, especially where die may have a high circuit count such as greater than 108 circuits. If the desired system function or performance needs to leverage 2×N, 4×N, 8×N, or more integrated circuits, with multiple die having high die to die interconnectivity, then a silicon based package, stacked die or a combination therein may be best suited to meet these applications.